To increase the density of wiring patterns of a wiring substrate on which an electronic component such as a semiconductor chip is mounted, a known wiring substrate is formed by alternately stacking wiring layers and insulation layers through a build-up process. The wiring layers are connected to each other by via wirings that are formed in through holes (via holes) extending through the insulation layer. The through holes are formed, for example, by irradiating the insulation layers with laser beams. Japanese Laid-Open Patent Publication No. 2016-035969 discloses such a conventional wiring substrate.